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Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)

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* Update InstEmitSimdHelper.cs

* Update InstEmitSimdArithmetic.cs

* Update OpCodeTable.cs

* Update CpuTestSimd.cs
This commit is contained in:
LDj3SNuD
2019-05-30 02:29:24 +02:00
committed by gdkchan
parent 12badfffb9
commit 51ea6fa583
4 changed files with 118 additions and 35 deletions
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29
ChocolArm64/Instructions/InstEmitSimdHelper.cs
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@ -821,6 +821,35 @@ namespace ChocolArm64.Instructions
}
}
public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
{
EmitVectorAcrossVectorOp(context, emit, true);
}
public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
{
EmitVectorAcrossVectorOp(context, emit, false);
}
public static void EmitVectorAcrossVectorOp(ILEmitterCtx context, Action emit, bool signed)
{
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
int bytes = op.GetBitsCount() >> 3;
int elems = bytes >> op.Size;
EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
for (int index = 1; index < elems; index++)
{
EmitVectorExtract(context, op.Rn, index, op.Size, signed);
emit();
}
EmitScalarSet(context, op.Rd, op.Size);
}
public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
{
OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;