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CPU: This PR fixes Fpscr, among other things.
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@ -538,9 +538,12 @@ namespace ARMeilleure.Instructions
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context.BranchIfFalse(lblNaN, isOrdered);
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Operand cf = context.AddIntrinsicInt(Intrinsic.X86Comissge, n, m);
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Operand zf = context.AddIntrinsicInt(Intrinsic.X86Comisseq, n, m);
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Operand nf = context.AddIntrinsicInt(Intrinsic.X86Comisslt, n, m);
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Operand nCopy = context.Copy(n);
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Operand mCopy = cmpWithZero ? null : context.Copy(m);
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Operand cf = context.AddIntrinsicInt(Intrinsic.X86Comissge, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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Operand zf = context.AddIntrinsicInt(Intrinsic.X86Comisseq, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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Operand nf = context.AddIntrinsicInt(Intrinsic.X86Comisslt, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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SetFlag(context, PState.VFlag, Const(0));
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SetFlag(context, PState.CFlag, cf);
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@ -555,9 +558,12 @@ namespace ARMeilleure.Instructions
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context.BranchIfFalse(lblNaN, isOrdered);
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Operand cf = context.AddIntrinsicInt(Intrinsic.X86Comisdge, n, m);
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Operand zf = context.AddIntrinsicInt(Intrinsic.X86Comisdeq, n, m);
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Operand nf = context.AddIntrinsicInt(Intrinsic.X86Comisdlt, n, m);
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Operand nCopy = context.Copy(n);
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Operand mCopy = cmpWithZero ? null : context.Copy(m);
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Operand cf = context.AddIntrinsicInt(Intrinsic.X86Comisdge, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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Operand zf = context.AddIntrinsicInt(Intrinsic.X86Comisdeq, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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Operand nf = context.AddIntrinsicInt(Intrinsic.X86Comisdlt, nCopy, cmpWithZero ? context.VectorZero() : mCopy);
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SetFlag(context, PState.VFlag, Const(0));
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SetFlag(context, PState.CFlag, cf);
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