LDj3SNuD e36e97c64d

CPU: This PR fixes Fpscr, among other things. (#1433) ...

* CPU: This PR fixes Fpscr, among other things.

* Add Fpscr.Qc = 1 if sat. for Vqrshrn & Vqrshrun.

* Fix Vcmp & Vcmpe opcode table.

* Revert "Fix Vcmp & Vcmpe opcode table."

This reverts commit c117d9410d693185ff5f8ee8e457ffbfb2027dd5.

* Address PR feedbacks.

2020-08-08 17:18:51 +02:00

..

CryptoHelper.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitAlu32.cs

Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)

2020-03-11 11:49:27 +11:00

InstEmitAlu.cs

Add most of the A32 instruction set to ARMeilleure (#897)

2020-02-24 08:20:40 +11:00

InstEmitAluHelper.cs

Use a Jump Table for direct and indirect calls/jumps, removing transitions to managed (#975)

2020-03-12 14:20:55 +11:00

InstEmitBfm.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitCcmp.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitCsel.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitDiv.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitException32.cs

Generalize tail continues (#1298)

2020-06-18 13:37:21 +10:00

InstEmitException.cs

Generalize tail continues (#1298)

2020-06-18 13:37:21 +10:00

InstEmitFlow32.cs

Generalize tail continues (#1298)

2020-06-18 13:37:21 +10:00

InstEmitFlow.cs

Generalize tail continues (#1298)

2020-06-18 13:37:21 +10:00

InstEmitFlowHelper.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

InstEmitHash32.cs

Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)

2020-07-13 20:48:14 +10:00

InstEmitHash.cs

Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)

2020-07-13 20:48:14 +10:00

InstEmitHashHelper.cs

Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)

2020-07-13 20:48:14 +10:00

InstEmitHelper.cs

Use a Jump Table for direct and indirect calls/jumps, removing transitions to managed (#975)

2020-03-12 14:20:55 +11:00

InstEmitMemory32.cs

Add most of the A32 instruction set to ARMeilleure (#897)

2020-02-24 08:20:40 +11:00

InstEmitMemory.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitMemoryEx32.cs

Implement inline memory load/store exclusive and ordered (#1413)

2020-07-30 11:29:28 -03:00

InstEmitMemoryEx.cs

Implement inline memory load/store exclusive and ordered (#1413)

2020-07-30 11:29:28 -03:00

InstEmitMemoryExHelper.cs

Improve branch operations (#1442)

2020-08-05 08:52:33 +10:00

InstEmitMemoryHelper.cs

Improve branch operations (#1442)

2020-08-05 08:52:33 +10:00

InstEmitMove.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitMul32.cs

Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)

2020-03-01 07:51:55 +11:00

InstEmitMul.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitSimdArithmetic32.cs

CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394)

2020-07-17 10:57:49 -03:00

InstEmitSimdArithmetic.cs

Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)

2020-07-13 21:08:47 +10:00

InstEmitSimdCmp32.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

InstEmitSimdCmp.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

InstEmitSimdCrypto32.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdCrypto.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdCvt32.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdCvt.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdHash.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdHelper32.cs

Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)

2020-07-19 15:11:58 -03:00

InstEmitSimdHelper.cs

Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)

2020-07-13 21:08:47 +10:00

InstEmitSimdLogical32.cs

Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)

2020-07-19 15:11:58 -03:00

InstEmitSimdLogical.cs

Implemented fast paths for: (#846)

2019-12-29 22:22:47 -03:00

InstEmitSimdMemory32.cs

Add most of the A32 instruction set to ARMeilleure (#897)

2020-02-24 08:20:40 +11:00

InstEmitSimdMemory.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstEmitSimdMove32.cs

Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)

2020-06-24 10:43:44 +10:00

InstEmitSimdMove.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstEmitSimdShift32.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

InstEmitSimdShift.cs

Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)

2020-07-13 21:08:47 +10:00

InstEmitSystem32.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

InstEmitSystem.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00

InstName.cs

Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)

2020-07-19 15:11:58 -03:00

NativeInterface.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

SoftFallback.cs

Improve V128 (#1097)

2020-04-17 08:19:20 +10:00

SoftFloat.cs

Add Profiled Persistent Translation Cache. (#769)

2020-06-16 20:28:02 +02:00