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7f6b3d234a0dd82866e89930f05c520aca94946e
Ryujinx/Ryujinx.Graphics.Shader/Decoders
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gdkchan 7f6b3d234a Implement IMUL, PCNT and CONT shader instructions, fix FFMA32I and HFMA32I (#2972) 
* Implement IMUL shader instruction

* Implement PCNT/CONT instruction and fix FFMA32I

* Add HFMA232I to the table

* Shader cache version bump

* No Rc on Ffma32i
2022-01-10 12:08:00 -03:00
..
BitfieldExtensions.cs
Rewrite shader decoding stage (#2698)
2021-10-12 22:35:31 +02:00
Block.cs
Rewrite shader decoding stage (#2698)
2021-10-12 22:35:31 +02:00
DecodedFunction.cs
Add support for fragment shader interlock (#2768)
2021-10-28 19:53:12 -03:00
DecodedProgram.cs
Add support for fragment shader interlock (#2768)
2021-10-28 19:53:12 -03:00
Decoder.cs
Implement IMUL, PCNT and CONT shader instructions, fix FFMA32I and HFMA32I (#2972)
2022-01-10 12:08:00 -03:00
FunctionType.cs
Add support for fragment shader interlock (#2768)
2021-10-28 19:53:12 -03:00
InstDecoders.cs
Implement IMUL, PCNT and CONT shader instructions, fix FFMA32I and HFMA32I (#2972)
2022-01-10 12:08:00 -03:00
InstName.cs
Rewrite shader decoding stage (#2698)
2021-10-12 22:35:31 +02:00
InstOp.cs
Rewrite shader decoding stage (#2698)
2021-10-12 22:35:31 +02:00
InstProps.cs
Add support for fragment shader interlock (#2768)
2021-10-28 19:53:12 -03:00
InstTable.cs
Implement IMUL, PCNT and CONT shader instructions, fix FFMA32I and HFMA32I (#2972)
2022-01-10 12:08:00 -03:00
Register.cs
Initial work
2020-01-09 02:13:00 +01:00
RegisterConsts.cs
Initial work
2020-01-09 02:13:00 +01:00
RegisterType.cs
Initial work
2020-01-09 02:13:00 +01:00