mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2025-10-25 21:13:55 -07:00
2f16491712
* Get rid of Reflection.Emit dependency on CPU and Shader projects * Remove useless private sets * Missed those due to the alignment
46 lines
1.3 KiB
C#
46 lines
1.3 KiB
C#
namespace ARMeilleure.Decoders
|
|
{
|
|
class OpCode32SimdShImm : OpCode32Simd
|
|
{
|
|
public int Shift { get; }
|
|
|
|
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdShImm(inst, address, opCode);
|
|
|
|
public OpCode32SimdShImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
|
|
{
|
|
int imm6 = (opCode >> 16) & 0x3f;
|
|
int limm6 = ((opCode >> 1) & 0x40) | imm6;
|
|
|
|
if ((limm6 & 0x40) == 0b1000000)
|
|
{
|
|
Size = 3;
|
|
Shift = imm6;
|
|
}
|
|
else if ((limm6 & 0x60) == 0b0100000)
|
|
{
|
|
Size = 2;
|
|
Shift = imm6 - 32;
|
|
}
|
|
else if ((limm6 & 0x70) == 0b0010000)
|
|
{
|
|
Size = 1;
|
|
Shift = imm6 - 16;
|
|
}
|
|
else if ((limm6 & 0x78) == 0b0001000)
|
|
{
|
|
Size = 0;
|
|
Shift = imm6 - 8;
|
|
}
|
|
else
|
|
{
|
|
Instruction = InstDescriptor.Undefined;
|
|
}
|
|
|
|
if (GetType() == typeof(OpCode32SimdShImm) && DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm))
|
|
{
|
|
Instruction = InstDescriptor.Undefined;
|
|
}
|
|
}
|
|
}
|
|
}
|