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https://github.com/Ryujinx/Ryujinx.git
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eafc58c9f2
* Add flags parameters in singleOpcode function, and add ADC Test * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs
72 lines
2.2 KiB
C#
72 lines
2.2 KiB
C#
using ChocolArm64.State;
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using NUnit.Framework;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTestAlu : CpuTest
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{
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[TestCase(2u, 3u, 6ul, true)]
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[TestCase(2u, 3u, 5ul, false)]
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public void Adc(uint A, uint B, ulong Result, bool CarryTest)
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{
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// ADC X0, X1, X2
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AThreadState ThreadState = SingleOpcode(0x9A020020, X1: A, X2: B, Carry: CarryTest);
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Assert.AreEqual(Result, ThreadState.X0);
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}
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[Test]
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public void Add()
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{
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// ADD X0, X1, X2
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AThreadState ThreadState = SingleOpcode(0x8B020020, X1: 1, X2: 2);
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Assert.AreEqual(3, ThreadState.X0);
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}
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[TestCase(0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFul, true, false)]
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[TestCase(0xFFFFFFFFu, 0x00000000u, 0x00000000ul, false, true)]
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[TestCase(0x12345678u, 0x7324A993u, 0x12240010ul, false, false)]
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public void Ands(uint A, uint B, ulong Result, bool Negative, bool Zero)
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{
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// ANDS W0, W1, W2
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uint Opcode = 0x6A020020;
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AThreadState ThreadState = SingleOpcode(Opcode, X1: A, X2: B);
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Assert.AreEqual(Result, ThreadState.X0);
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Assert.AreEqual(Negative, ThreadState.Negative);
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Assert.AreEqual(Zero, ThreadState.Zero);
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}
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[Test]
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public void OrrBitmasks()
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{
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// ORR W0, WZR, #0x01010101
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Assert.AreEqual(0x01010101, SingleOpcode(0x3200C3E0).X0);
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Reset();
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// ORR W1, WZR, #0x00F000F0
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Assert.AreEqual(0x00F000F0, SingleOpcode(0x320C8FE1).X1);
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Reset();
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// ORR W2, WZR, #1
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Assert.AreEqual(0x00000001, SingleOpcode(0x320003E2).X2);
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}
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[Test]
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public void RevX0X0()
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{
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// REV X0, X0
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AThreadState ThreadState = SingleOpcode(0xDAC00C00, X0: 0xAABBCCDDEEFF1100);
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Assert.AreEqual(0x0011FFEEDDCCBBAA, ThreadState.X0);
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}
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[Test]
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public void RevW1W1()
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{
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// REV W1, W1
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AThreadState ThreadState = SingleOpcode(0x5AC00821, X1: 0x12345678);
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Assert.AreEqual(0x78563412, ThreadState.X1);
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}
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}
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}
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