mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-12-30 13:01:20 -08:00
c86aacde76
* Initial nvdec implementation using FFmpeg * Fix swapped channels on the video decoder and the G8R8 texture format * Fix texture samplers not being set properly (regression) * Rebased * Remove unused code introduced on the rebase * Add support for RGBA8 output format on the video image composer * Correct spacing * Some fixes for rebase and other tweaks * Allow size mismatch on frame copy * Get rid of GetHostAddress calls on VDec
416 lines
11 KiB
C#
416 lines
11 KiB
C#
using Ryujinx.Common.Logging;
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using Ryujinx.Graphics.Memory;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Graphics3d
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{
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class MacroInterpreter
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{
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private enum AssignmentOperation
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{
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IgnoreAndFetch = 0,
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Move = 1,
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MoveAndSetMaddr = 2,
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FetchAndSend = 3,
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MoveAndSend = 4,
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FetchAndSetMaddr = 5,
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MoveAndSetMaddrThenFetchAndSend = 6,
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MoveAndSetMaddrThenSendHigh = 7
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}
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private enum AluOperation
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{
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AluReg = 0,
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AddImmediate = 1,
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BitfieldReplace = 2,
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BitfieldExtractLslImm = 3,
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BitfieldExtractLslReg = 4,
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ReadImmediate = 5
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}
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private enum AluRegOperation
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{
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Add = 0,
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AddWithCarry = 1,
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Subtract = 2,
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SubtractWithBorrow = 3,
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BitwiseExclusiveOr = 8,
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BitwiseOr = 9,
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BitwiseAnd = 10,
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BitwiseAndNot = 11,
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BitwiseNotAnd = 12
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}
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private NvGpuFifo PFifo;
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private INvGpuEngine Engine;
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public Queue<int> Fifo { get; private set; }
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private int[] Gprs;
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private int MethAddr;
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private int MethIncr;
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private bool Carry;
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private int OpCode;
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private int PipeOp;
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private int Pc;
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public MacroInterpreter(NvGpuFifo PFifo, INvGpuEngine Engine)
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{
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this.PFifo = PFifo;
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this.Engine = Engine;
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Fifo = new Queue<int>();
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Gprs = new int[8];
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}
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public void Execute(NvGpuVmm Vmm, int[] Mme, int Position, int Param)
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{
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Reset();
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Gprs[1] = Param;
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Pc = Position;
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FetchOpCode(Mme);
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while (Step(Vmm, Mme));
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//Due to the delay slot, we still need to execute
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//one more instruction before we actually exit.
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Step(Vmm, Mme);
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}
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private void Reset()
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{
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for (int Index = 0; Index < Gprs.Length; Index++)
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{
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Gprs[Index] = 0;
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}
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MethAddr = 0;
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MethIncr = 0;
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Carry = false;
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}
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private bool Step(NvGpuVmm Vmm, int[] Mme)
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{
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int BaseAddr = Pc - 1;
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FetchOpCode(Mme);
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if ((OpCode & 7) < 7)
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{
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//Operation produces a value.
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AssignmentOperation AsgOp = (AssignmentOperation)((OpCode >> 4) & 7);
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int Result = GetAluResult();
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switch (AsgOp)
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{
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//Fetch parameter and ignore result.
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case AssignmentOperation.IgnoreAndFetch:
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{
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SetDstGpr(FetchParam());
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break;
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}
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//Move result.
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case AssignmentOperation.Move:
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{
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SetDstGpr(Result);
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break;
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}
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//Move result and use as Method Address.
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case AssignmentOperation.MoveAndSetMaddr:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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break;
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}
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//Fetch parameter and send result.
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case AssignmentOperation.FetchAndSend:
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{
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SetDstGpr(FetchParam());
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Send(Vmm, Result);
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break;
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}
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//Move and send result.
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case AssignmentOperation.MoveAndSend:
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{
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SetDstGpr(Result);
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Send(Vmm, Result);
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break;
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}
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//Fetch parameter and use result as Method Address.
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case AssignmentOperation.FetchAndSetMaddr:
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{
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SetDstGpr(FetchParam());
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SetMethAddr(Result);
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break;
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}
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//Move result and use as Method Address, then fetch and send paramter.
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case AssignmentOperation.MoveAndSetMaddrThenFetchAndSend:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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Send(Vmm, FetchParam());
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break;
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}
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//Move result and use as Method Address, then send bits 17:12 of result.
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case AssignmentOperation.MoveAndSetMaddrThenSendHigh:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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Send(Vmm, (Result >> 12) & 0x3f);
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break;
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}
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}
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}
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else
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{
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//Branch.
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bool OnNotZero = ((OpCode >> 4) & 1) != 0;
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bool Taken = OnNotZero
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? GetGprA() != 0
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: GetGprA() == 0;
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if (Taken)
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{
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Pc = BaseAddr + GetImm();
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bool NoDelays = (OpCode & 0x20) != 0;
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if (NoDelays)
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{
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FetchOpCode(Mme);
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}
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return true;
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}
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}
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bool Exit = (OpCode & 0x80) != 0;
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return !Exit;
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}
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private void FetchOpCode(int[] Mme)
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{
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OpCode = PipeOp;
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PipeOp = Mme[Pc++];
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}
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private int GetAluResult()
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{
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AluOperation Op = (AluOperation)(OpCode & 7);
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switch (Op)
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{
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case AluOperation.AluReg:
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{
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AluRegOperation AluOp = (AluRegOperation)((OpCode >> 17) & 0x1f);
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return GetAluResult(AluOp, GetGprA(), GetGprB());
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}
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case AluOperation.AddImmediate:
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{
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return GetGprA() + GetImm();
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}
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case AluOperation.BitfieldReplace:
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case AluOperation.BitfieldExtractLslImm:
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case AluOperation.BitfieldExtractLslReg:
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{
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int BfSrcBit = (OpCode >> 17) & 0x1f;
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int BfSize = (OpCode >> 22) & 0x1f;
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int BfDstBit = (OpCode >> 27) & 0x1f;
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int BfMask = (1 << BfSize) - 1;
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int Dst = GetGprA();
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int Src = GetGprB();
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switch (Op)
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{
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case AluOperation.BitfieldReplace:
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{
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Src = (int)((uint)Src >> BfSrcBit) & BfMask;
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Dst &= ~(BfMask << BfDstBit);
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Dst |= Src << BfDstBit;
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return Dst;
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}
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case AluOperation.BitfieldExtractLslImm:
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{
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Src = (int)((uint)Src >> Dst) & BfMask;
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return Src << BfDstBit;
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}
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case AluOperation.BitfieldExtractLslReg:
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{
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Src = (int)((uint)Src >> BfSrcBit) & BfMask;
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return Src << Dst;
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}
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}
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break;
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}
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case AluOperation.ReadImmediate:
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{
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return Read(GetGprA() + GetImm());
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}
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}
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throw new ArgumentException(nameof(OpCode));
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}
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private int GetAluResult(AluRegOperation AluOp, int A, int B)
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{
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switch (AluOp)
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{
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case AluRegOperation.Add:
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{
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ulong Result = (ulong)A + (ulong)B;
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Carry = Result > 0xffffffff;
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return (int)Result;
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}
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case AluRegOperation.AddWithCarry:
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{
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ulong Result = (ulong)A + (ulong)B + (Carry ? 1UL : 0UL);
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Carry = Result > 0xffffffff;
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return (int)Result;
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}
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case AluRegOperation.Subtract:
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{
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ulong Result = (ulong)A - (ulong)B;
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Carry = Result < 0x100000000;
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return (int)Result;
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}
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case AluRegOperation.SubtractWithBorrow:
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{
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ulong Result = (ulong)A - (ulong)B - (Carry ? 0UL : 1UL);
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Carry = Result < 0x100000000;
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return (int)Result;
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}
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case AluRegOperation.BitwiseExclusiveOr: return A ^ B;
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case AluRegOperation.BitwiseOr: return A | B;
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case AluRegOperation.BitwiseAnd: return A & B;
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case AluRegOperation.BitwiseAndNot: return A & ~B;
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case AluRegOperation.BitwiseNotAnd: return ~(A & B);
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}
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throw new ArgumentOutOfRangeException(nameof(AluOp));
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}
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private int GetImm()
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{
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//Note: The immediate is signed, the sign-extension is intended here.
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return OpCode >> 14;
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}
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private void SetMethAddr(int Value)
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{
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MethAddr = (Value >> 0) & 0xfff;
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MethIncr = (Value >> 12) & 0x3f;
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}
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private void SetDstGpr(int Value)
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{
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Gprs[(OpCode >> 8) & 7] = Value;
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}
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private int GetGprA()
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{
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return GetGprValue((OpCode >> 11) & 7);
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}
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private int GetGprB()
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{
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return GetGprValue((OpCode >> 14) & 7);
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}
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private int GetGprValue(int Index)
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{
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return Index != 0 ? Gprs[Index] : 0;
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}
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private int FetchParam()
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{
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int Value;
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if (!Fifo.TryDequeue(out Value))
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{
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Logger.PrintWarning(LogClass.Gpu, "Macro attempted to fetch an inexistent argument.");
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return 0;
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}
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return Value;
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}
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private int Read(int Reg)
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{
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return Engine.Registers[Reg];
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}
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private void Send(NvGpuVmm Vmm, int Value)
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{
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GpuMethodCall MethCall = new GpuMethodCall(MethAddr, Value);
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Engine.CallMethod(Vmm, MethCall);
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MethAddr += MethIncr;
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}
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}
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} |