2018-02-07 18:54:35 -08:00
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// Copyright 2018 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <memory>
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2018-10-29 21:03:25 -07:00
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#include <optional>
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2018-04-21 11:40:51 -07:00
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#include <vector>
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2018-04-21 09:31:30 -07:00
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2018-02-07 18:54:35 -08:00
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#include "common/common_types.h"
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2018-02-11 20:44:12 -08:00
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namespace Tegra {
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2018-02-07 18:54:35 -08:00
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class MemoryManager final {
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public:
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MemoryManager();
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2018-04-21 08:16:21 -07:00
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GPUVAddr AllocateSpace(u64 size, u64 align);
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GPUVAddr AllocateSpace(GPUVAddr gpu_addr, u64 size, u64 align);
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GPUVAddr MapBufferEx(VAddr cpu_addr, u64 size);
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GPUVAddr MapBufferEx(VAddr cpu_addr, GPUVAddr gpu_addr, u64 size);
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2018-05-20 12:21:06 -07:00
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GPUVAddr UnmapBuffer(GPUVAddr gpu_addr, u64 size);
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2018-10-12 18:52:16 -07:00
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GPUVAddr GetRegionEnd(GPUVAddr region_start) const;
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2018-10-29 21:03:25 -07:00
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std::optional<VAddr> GpuToCpuAddress(GPUVAddr gpu_addr);
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2018-02-07 18:54:35 -08:00
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2018-04-23 08:57:12 -07:00
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static constexpr u64 PAGE_BITS = 16;
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static constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
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static constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
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2019-02-23 21:15:35 -08:00
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u8 Read8(GPUVAddr addr);
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u16 Read16(GPUVAddr addr);
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u32 Read32(GPUVAddr addr);
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u64 Read64(GPUVAddr addr);
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void Write8(GPUVAddr addr, u8 data);
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void Write16(GPUVAddr addr, u16 data);
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void Write32(GPUVAddr addr, u32 data);
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void Write64(GPUVAddr addr, u64 data);
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u8* GetPointer(GPUVAddr vaddr);
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void ReadBlock(GPUVAddr src_addr, void* dest_buffer, std::size_t size);
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void WriteBlock(GPUVAddr dest_addr, const void* src_buffer, std::size_t size);
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void CopyBlock(VAddr dest_addr, VAddr src_addr, std::size_t size);
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2018-02-07 18:54:35 -08:00
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private:
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enum class PageStatus : u64 {
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Unmapped = 0xFFFFFFFFFFFFFFFFULL,
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Allocated = 0xFFFFFFFFFFFFFFFEULL,
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Reserved = 0xFFFFFFFFFFFFFFFDULL,
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};
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2018-10-31 19:20:37 -07:00
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std::optional<GPUVAddr> FindFreeBlock(GPUVAddr region_start, u64 size, u64 align,
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PageStatus status);
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VAddr& PageSlot(GPUVAddr gpu_addr);
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static constexpr u64 MAX_ADDRESS{0x10000000000ULL};
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static constexpr u64 PAGE_TABLE_BITS{10};
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static constexpr u64 PAGE_TABLE_SIZE{1 << PAGE_TABLE_BITS};
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static constexpr u64 PAGE_TABLE_MASK{PAGE_TABLE_SIZE - 1};
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static constexpr u64 PAGE_BLOCK_BITS{14};
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static constexpr u64 PAGE_BLOCK_SIZE{1 << PAGE_BLOCK_BITS};
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static constexpr u64 PAGE_BLOCK_MASK{PAGE_BLOCK_SIZE - 1};
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using PageBlock = std::array<VAddr, PAGE_BLOCK_SIZE>;
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std::array<std::unique_ptr<PageBlock>, PAGE_TABLE_SIZE> page_table{};
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struct MappedRegion {
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VAddr cpu_addr;
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GPUVAddr gpu_addr;
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u64 size;
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};
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std::vector<MappedRegion> mapped_regions;
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};
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2018-02-11 20:44:12 -08:00
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} // namespace Tegra
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