mirror of
https://github.com/yuzu-emu/yuzu-android
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68 lines
2.2 KiB
C++
68 lines
2.2 KiB
C++
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_encoding.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void DADD(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_a_reg;
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BitField<39, 2, FpRounding> fp_rounding;
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BitField<45, 1, u64> neg_b;
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BitField<46, 1, u64> abs_a;
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BitField<47, 1, u64> cc;
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BitField<48, 1, u64> neg_a;
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BitField<49, 1, u64> abs_b;
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} const dadd{insn};
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if (!IR::IsAligned(dadd.dest_reg, 2)) {
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throw NotImplementedException("Unaligned destination register {}", dadd.dest_reg.Value());
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}
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if (!IR::IsAligned(dadd.src_a_reg, 2)) {
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throw NotImplementedException("Unaligned destination register {}", dadd.src_a_reg.Value());
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}
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if (dadd.cc != 0) {
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throw NotImplementedException("DADD CC");
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}
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const IR::Reg reg_a{dadd.src_a_reg};
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const IR::F64 src_a{v.ir.PackDouble2x32(v.ir.CompositeConstruct(v.X(reg_a), v.X(reg_a + 1)))};
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const IR::F64 op_a{v.ir.FPAbsNeg(src_a, dadd.abs_a != 0, dadd.neg_a != 0)};
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const IR::F64 op_b{v.ir.FPAbsNeg(src_b, dadd.abs_b != 0, dadd.neg_b != 0)};
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IR::FpControl control{
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.no_contraction{true},
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.rounding{CastFpRounding(dadd.fp_rounding)},
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.fmz_mode{IR::FmzMode::None},
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};
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const IR::F64 value{v.ir.FPAdd(op_a, op_b, control)};
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const IR::Value result{v.ir.UnpackDouble2x32(value)};
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for (int i = 0; i < 2; i++) {
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v.X(dadd.dest_reg + i, IR::U32{v.ir.CompositeExtract(result, i)});
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::DADD_reg(u64 insn) {
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DADD(*this, insn, GetDoubleReg20(insn));
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}
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void TranslatorVisitor::DADD_cbuf(u64 insn) {
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DADD(*this, insn, GetDoubleCbuf(insn));
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}
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void TranslatorVisitor::DADD_imm(u64 insn) {
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DADD(*this, insn, GetDoubleImm20(insn));
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}
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} // namespace Shader::Maxwell
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