2018-02-07 18:54:35 -08:00
|
|
|
// Copyright 2018 yuzu emulator team
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
2018-04-23 08:57:12 -07:00
|
|
|
#include "common/alignment.h"
|
2018-02-07 18:54:35 -08:00
|
|
|
#include "common/assert.h"
|
2018-02-11 20:44:12 -08:00
|
|
|
#include "video_core/memory_manager.h"
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-02-11 20:44:12 -08:00
|
|
|
namespace Tegra {
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
GPUVAddr MemoryManager::AllocateSpace(u64 size, u64 align) {
|
2018-10-29 21:03:25 -07:00
|
|
|
std::optional<GPUVAddr> gpu_addr = FindFreeBlock(size, align);
|
2018-04-21 08:16:21 -07:00
|
|
|
ASSERT(gpu_addr);
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-04-23 08:57:12 -07:00
|
|
|
for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
|
2018-07-24 08:19:51 -07:00
|
|
|
VAddr& slot = PageSlot(*gpu_addr + offset);
|
|
|
|
|
|
|
|
ASSERT(slot == static_cast<u64>(PageStatus::Unmapped));
|
|
|
|
slot = static_cast<u64>(PageStatus::Allocated);
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
return *gpu_addr;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
GPUVAddr MemoryManager::AllocateSpace(GPUVAddr gpu_addr, u64 size, u64 align) {
|
2018-04-23 08:57:12 -07:00
|
|
|
for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
|
2018-07-24 08:19:51 -07:00
|
|
|
VAddr& slot = PageSlot(gpu_addr + offset);
|
|
|
|
|
|
|
|
ASSERT(slot == static_cast<u64>(PageStatus::Unmapped));
|
|
|
|
slot = static_cast<u64>(PageStatus::Allocated);
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
return gpu_addr;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
GPUVAddr MemoryManager::MapBufferEx(VAddr cpu_addr, u64 size) {
|
2018-10-29 21:03:25 -07:00
|
|
|
std::optional<GPUVAddr> gpu_addr = FindFreeBlock(size, PAGE_SIZE);
|
2018-04-21 08:16:21 -07:00
|
|
|
ASSERT(gpu_addr);
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-04-23 08:57:12 -07:00
|
|
|
for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
|
2018-07-24 08:19:51 -07:00
|
|
|
VAddr& slot = PageSlot(*gpu_addr + offset);
|
|
|
|
|
|
|
|
ASSERT(slot == static_cast<u64>(PageStatus::Unmapped));
|
|
|
|
slot = cpu_addr + offset;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 11:40:51 -07:00
|
|
|
MappedRegion region{cpu_addr, *gpu_addr, size};
|
|
|
|
mapped_regions.push_back(region);
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
return *gpu_addr;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
GPUVAddr MemoryManager::MapBufferEx(VAddr cpu_addr, GPUVAddr gpu_addr, u64 size) {
|
|
|
|
ASSERT((gpu_addr & PAGE_MASK) == 0);
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-04-23 08:57:12 -07:00
|
|
|
for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
|
2018-07-24 08:19:51 -07:00
|
|
|
VAddr& slot = PageSlot(gpu_addr + offset);
|
|
|
|
|
|
|
|
ASSERT(slot == static_cast<u64>(PageStatus::Allocated));
|
|
|
|
slot = cpu_addr + offset;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 11:40:51 -07:00
|
|
|
MappedRegion region{cpu_addr, gpu_addr, size};
|
|
|
|
mapped_regions.push_back(region);
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
return gpu_addr;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-05-20 12:21:06 -07:00
|
|
|
GPUVAddr MemoryManager::UnmapBuffer(GPUVAddr gpu_addr, u64 size) {
|
|
|
|
ASSERT((gpu_addr & PAGE_MASK) == 0);
|
|
|
|
|
|
|
|
for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
|
2018-07-24 08:19:51 -07:00
|
|
|
VAddr& slot = PageSlot(gpu_addr + offset);
|
|
|
|
|
|
|
|
ASSERT(slot != static_cast<u64>(PageStatus::Allocated) &&
|
|
|
|
slot != static_cast<u64>(PageStatus::Unmapped));
|
|
|
|
slot = static_cast<u64>(PageStatus::Unmapped);
|
2018-05-20 12:21:06 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
// Delete the region mappings that are contained within the unmapped region
|
|
|
|
mapped_regions.erase(std::remove_if(mapped_regions.begin(), mapped_regions.end(),
|
|
|
|
[&](const MappedRegion& region) {
|
|
|
|
return region.gpu_addr <= gpu_addr &&
|
|
|
|
region.gpu_addr + region.size < gpu_addr + size;
|
|
|
|
}),
|
|
|
|
mapped_regions.end());
|
|
|
|
return gpu_addr;
|
|
|
|
}
|
|
|
|
|
2018-10-12 18:52:16 -07:00
|
|
|
GPUVAddr MemoryManager::GetRegionEnd(GPUVAddr region_start) const {
|
|
|
|
for (const auto& region : mapped_regions) {
|
|
|
|
const GPUVAddr region_end{region.gpu_addr + region.size};
|
|
|
|
if (region_start >= region.gpu_addr && region_start < region_end) {
|
|
|
|
return region_end;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
2018-10-29 21:03:25 -07:00
|
|
|
std::optional<GPUVAddr> MemoryManager::FindFreeBlock(u64 size, u64 align) {
|
2018-04-21 08:16:21 -07:00
|
|
|
GPUVAddr gpu_addr = 0;
|
2018-04-23 08:57:12 -07:00
|
|
|
u64 free_space = 0;
|
|
|
|
align = (align + PAGE_MASK) & ~PAGE_MASK;
|
2018-02-07 18:54:35 -08:00
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
while (gpu_addr + free_space < MAX_ADDRESS) {
|
|
|
|
if (!IsPageMapped(gpu_addr + free_space)) {
|
2018-04-23 08:57:12 -07:00
|
|
|
free_space += PAGE_SIZE;
|
2018-02-07 18:54:35 -08:00
|
|
|
if (free_space >= size) {
|
2018-04-21 08:16:21 -07:00
|
|
|
return gpu_addr;
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
} else {
|
2018-04-21 08:16:21 -07:00
|
|
|
gpu_addr += free_space + PAGE_SIZE;
|
2018-02-07 18:54:35 -08:00
|
|
|
free_space = 0;
|
2018-04-21 08:16:21 -07:00
|
|
|
gpu_addr = Common::AlignUp(gpu_addr, align);
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
2018-10-29 21:03:25 -07:00
|
|
|
std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) {
|
2018-04-21 08:16:21 -07:00
|
|
|
VAddr base_addr = PageSlot(gpu_addr);
|
2018-04-21 09:31:30 -07:00
|
|
|
|
2018-07-02 07:42:48 -07:00
|
|
|
if (base_addr == static_cast<u64>(PageStatus::Allocated) ||
|
|
|
|
base_addr == static_cast<u64>(PageStatus::Unmapped)) {
|
2018-04-21 09:31:30 -07:00
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
return base_addr + (gpu_addr & PAGE_MASK);
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 11:40:51 -07:00
|
|
|
std::vector<GPUVAddr> MemoryManager::CpuToGpuAddress(VAddr cpu_addr) const {
|
|
|
|
std::vector<GPUVAddr> results;
|
|
|
|
for (const auto& region : mapped_regions) {
|
|
|
|
if (cpu_addr >= region.cpu_addr && cpu_addr < (region.cpu_addr + region.size)) {
|
|
|
|
u64 offset = cpu_addr - region.cpu_addr;
|
|
|
|
results.push_back(region.gpu_addr + offset);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return results;
|
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
bool MemoryManager::IsPageMapped(GPUVAddr gpu_addr) {
|
|
|
|
return PageSlot(gpu_addr) != static_cast<u64>(PageStatus::Unmapped);
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-04-21 08:16:21 -07:00
|
|
|
VAddr& MemoryManager::PageSlot(GPUVAddr gpu_addr) {
|
|
|
|
auto& block = page_table[(gpu_addr >> (PAGE_BITS + PAGE_TABLE_BITS)) & PAGE_TABLE_MASK];
|
2018-02-07 18:54:35 -08:00
|
|
|
if (!block) {
|
|
|
|
block = std::make_unique<PageBlock>();
|
2018-07-24 08:51:10 -07:00
|
|
|
block->fill(static_cast<VAddr>(PageStatus::Unmapped));
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
2018-04-21 08:16:21 -07:00
|
|
|
return (*block)[(gpu_addr >> PAGE_BITS) & PAGE_BLOCK_MASK];
|
2018-02-07 18:54:35 -08:00
|
|
|
}
|
|
|
|
|
2018-02-11 20:44:12 -08:00
|
|
|
} // namespace Tegra
|