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https://github.com/yuzu-emu/yuzu-android
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gl_shader_decompiler: Refactor uniform handling to allow different decodings.
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be09dfeed9
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@ -109,11 +109,6 @@ union Sampler {
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u64 value{};
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u64 value{};
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};
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};
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union Uniform {
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BitField<20, 14, u64> offset;
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BitField<34, 5, u64> index;
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};
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} // namespace Shader
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} // namespace Shader
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} // namespace Tegra
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} // namespace Tegra
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@ -354,12 +349,21 @@ union Instruction {
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}
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}
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} bra;
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} bra;
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union {
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BitField<20, 14, u64> offset;
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BitField<34, 5, u64> index;
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} cbuf34;
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union {
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BitField<20, 16, s64> offset;
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BitField<36, 5, u64> index;
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} cbuf36;
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BitField<61, 1, u64> is_b_imm;
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BitField<61, 1, u64> is_b_imm;
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BitField<60, 1, u64> is_b_gpr;
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BitField<60, 1, u64> is_b_gpr;
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BitField<59, 1, u64> is_c_gpr;
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BitField<59, 1, u64> is_c_gpr;
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Attribute attribute;
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Attribute attribute;
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Uniform uniform;
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Sampler sampler;
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Sampler sampler;
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u64 value;
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u64 value;
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@ -20,7 +20,6 @@ using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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using Tegra::Shader::Register;
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using Tegra::Shader::Sampler;
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using Tegra::Shader::Sampler;
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using Tegra::Shader::SubOp;
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using Tegra::Shader::SubOp;
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using Tegra::Shader::Uniform;
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constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH;
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constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH;
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@ -365,11 +364,9 @@ public:
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}
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}
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/// Generates code representing a uniform (C buffer) register, interpreted as the input type.
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/// Generates code representing a uniform (C buffer) register, interpreted as the input type.
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std::string GetUniform(const Uniform& uniform, GLSLRegister::Type type) {
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std::string GetUniform(u64 index, u64 offset, GLSLRegister::Type type) {
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declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index),
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declr_const_buffers[index].MarkAsUsed(index, offset, stage);
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static_cast<unsigned>(uniform.offset), stage);
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std::string value = 'c' + std::to_string(index) + '[' + std::to_string(offset) + ']';
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std::string value =
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'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']';
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if (type == GLSLRegister::Type::Float) {
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if (type == GLSLRegister::Type::Float) {
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return value;
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return value;
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@ -380,12 +377,6 @@ public:
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}
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}
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}
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}
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/// Generates code representing a uniform (C buffer) register, interpreted as the type of the
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/// destination register.
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std::string GetUniform(const Uniform& uniform, const Register& dest_reg) {
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return GetUniform(uniform, regs[dest_reg].GetActiveType());
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}
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/// Add declarations for registers
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/// Add declarations for registers
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void GenerateDeclarations() {
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void GenerateDeclarations() {
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for (const auto& reg : regs) {
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for (const auto& reg : regs) {
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@ -747,7 +738,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, instr.gpr0);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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}
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}
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}
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}
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@ -904,7 +896,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsInteger(instr.gpr20);
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op_b += regs.GetRegisterAsInteger(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Integer);
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}
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}
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}
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}
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@ -936,7 +929,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsInteger(instr.gpr20);
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op_b += regs.GetRegisterAsInteger(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Integer);
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}
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}
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}
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}
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@ -953,7 +947,8 @@ private:
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switch (opcode->GetId()) {
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switch (opcode->GetId()) {
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case OpCode::Id::FFMA_CR: {
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case OpCode::Id::FFMA_CR: {
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op_b += regs.GetUniform(instr.uniform, instr.gpr0);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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op_c += regs.GetRegisterAsFloat(instr.gpr39);
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op_c += regs.GetRegisterAsFloat(instr.gpr39);
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break;
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break;
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}
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}
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@ -964,7 +959,8 @@ private:
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}
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}
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case OpCode::Id::FFMA_RC: {
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case OpCode::Id::FFMA_RC: {
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op_b += regs.GetRegisterAsFloat(instr.gpr39);
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op_b += regs.GetRegisterAsFloat(instr.gpr39);
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op_c += regs.GetUniform(instr.uniform, instr.gpr0);
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op_c += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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break;
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break;
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}
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}
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case OpCode::Id::FFMA_IMM: {
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case OpCode::Id::FFMA_IMM: {
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@ -1175,7 +1171,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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}
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}
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}
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}
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@ -1216,7 +1213,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed);
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op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Integer);
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}
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}
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using Tegra::Shader::Pred;
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using Tegra::Shader::Pred;
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@ -1262,7 +1260,8 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float);
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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}
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}
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}
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}
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