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de7cb91995
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556 Commits

Author SHA1 Message Date
bunnei
de7cb91995
Merge pull request #750 from lioncash/ctx 
arm_interface: Remove unused tls_address member of ThreadContext
 2018-07-21 11:38:16 -07:00
Subv
d84eb9dac6 CPU: Save and restore the TPIDR_EL0 system register on every context switch. 
Note that there's currently a dynarmic bug preventing this register from being written.
 2018-07-20 19:57:45 -05:00
Lioncash
ae09adfcb3 arm_interface: Remove unused tls_address member of ThreadContext 
Currently, the TLS address is set within the scheduler, making this
member unused.
 2018-07-20 18:57:40 -04:00
MerryMage
56cc1c11ec scheduler: Clear exclusive state when switching contexts 2018-07-16 11:24:00 +01:00
Hedges
e066bc75b9 More improvements to GDBStub (#653) 
* More improvements to GDBStub
- Debugging of threads should work correctly with source and assembly level stepping and modifying registers and memory, meaning threads and callstacks are fully clickable in VS.
- List of modules is available to the client, with assumption that .nro and .nso are backed up by an .elf with symbols, while deconstructed ROMs keep N names.
- Initial support for floating point registers.

* Tidy up as requested in PR feedback

* Tidy up as requested in PR feedback
 2018-07-12 20:22:59 -07:00
James Rowe
0d46f0df12 Update clang format 2018-07-02 21:45:47 -04:00
James Rowe
638956aa81 Rename logging macro back to LOG_* 2018-07-02 21:45:47 -04:00
Hedges
39fb3e362c GDB Stub Improvements (#508) 
* GDB Stub should work now.

* Applied clang-format.

* Replaced htonll with swap64.

* Tidy up.
 2018-06-06 00:20:47 -04:00
bunnei
a434fdcb10 core: Implement multicore support. 2018-05-10 19:34:46 -04:00
Lioncash
7c9644646f
general: Make formatting of logged hex values more straightforward 
This makes the formatting expectations more obvious (e.g. any zero padding specified
is padding that's entirely dedicated to the value being printed, not any pretty-printing
that also gets tacked on).
 2018-05-02 09:49:36 -04:00
Lioncash
8475496630
general: Convert assertion macros over to be fmt-compatible 2018-04-27 10:04:02 -04:00
Lioncash
c33755e2b9
core: Replace remaining old non-generic logger usages with fmt-capable equivalents 
LOG_GENERIC usages will be amended in a follow-up to keep API changes separate from
interface changes, as it will require removing a parameter from the relevant function
in the VMManager class.
 2018-04-26 15:37:16 -04:00
MerryMage
88c9608eac arm_dynarmic: Fix timing 2018-03-24 09:02:19 +00:00
N00byKing
ef875d6a35 Clean Warnings (?) 2018-03-19 17:07:08 +01:00
bunnei
23a0d2d7b7
Merge pull request #193 from N00byKing/3184_2_robotic_boogaloo 
Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
 2018-03-18 22:35:47 -04:00
bunnei
403f8e79ea arm_interface: Support unmapping previously mapped memory. 2018-03-16 18:32:24 -04:00
bunnei
7d6653268f core: Move process creation out of global state. 2018-03-14 18:42:19 -04:00
N00byKing
bc88cae0c7 Implements citra-emu/citra#3184 2018-02-25 11:44:21 +01:00
bunnei
c45173c9a6
Merge pull request #212 from mailwl/stubs 
Stub some functions
 2018-02-23 21:09:56 -08:00
mailwl
910198a29a Stub am::SetScreenShotPermission, and bsd::StartMonitoring functions 2018-02-22 13:04:23 +03:00
MerryMage
32d127ad3e dynarmic: Update to 6b4c6b0 
6b4c6b0 impl: Update PC when raising exception
7a1313a A64: Implement FDIV (vector)
b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
b277bf5 Correct FPSR and FPCR
7673933 A64: Implement USHL
8d0e558 A64: Implement UCVTF (vector, integer), scalar variant
da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point)
7479684 A64: Implement system register TPIDR_EL0
0fd75fd A64: Implement system registers FPCR and FPSR
31e370c A64: Implement system register CNTPCT_EL0
9a88fd3 A64: Implement system register CTR_EL0
1d16896 A64: Implement NEG (vector)
3184edf IR: Add IR instruction ZeroVector
31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter
567eb1a A64: Implement FMINNM (scalar)
c6d8fa1 A64: Implement FMAXNM (scalar)
616056d constant_pool: Add frame parameter
a3747cb A64: Implement ADDP (scalar)
5cd5d9f reg_alloc: Only exchange GPRs
dd0452a A64: Implement DUP (element), scalar variant
e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0
40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar)
7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect
826dce2 travis: Switch unicorn repository
9605f28 a64/config: Allow NaN emulation accuracy to be set
e9435bc a64_emit_x64: Add conf to A64EmitContext
30b596d fuzz_with_unicorn: Explicitly test floating point instructions
be292a8 A64: Implement FSQRT (scalar)
3c42d48 backend_x64: Accurately handle NaNs
4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
 2018-02-21 21:39:07 +00:00
MerryMage
e8b9731af3 arm_dynarmic: LOG_INFO on unicorn fallback 2018-02-21 21:39:07 +00:00
MerryMage
6085d32cf5 arm_dynarmic: Support direct page table access 2018-02-12 21:53:32 +00:00
MerryMage
d3bbed5e78 dynarmic: Update to 41ae12263 
Changes: Primarily implementing more A64 instructions
 2018-02-09 00:29:36 +00:00
River City Ransomware
dd62f125c3 Fixes some cast warnings, partial port of citra #3064 (#106) 
* Fixes some cast warnings, partially fixes citra #3064

* Converted casts to uint32_t to u32

* Ran clang-format
 2018-01-19 18:01:41 -05:00
MerryMage
e35644c005 clang-format 2018-01-16 18:05:21 +00:00
James Rowe
2d7a85f7af Build: Automagically handle unicorn 
On MSVC if unicorn isn't found, fallback to bundled unicorn
On everything else, fallback to building unicorn in externals

Also fixes loading unicorn in msvc
 2018-01-16 09:39:07 -07:00
James Rowe
e026b66bbb Build: Add unicorn as a submodule and build it if needed 
Adds a cmake custom target that will build unicorn on first compile and
uses this in the build scripts as well. Updates Appveyor and Travis
build scripts to work with the new unicorn build, and updates the paths
to all of the different artifacts.
 2018-01-16 01:15:52 -07:00
MerryMage
668e5452fa Update dynarmic to bc73004 
bc73004 a64_merge_interpret_blocks: Remove debug output
4e656ed tests/A64: Randomize PSTATE.<NZCV>
fd9530b A64: Optimization: Merge interpret blocks
3c9eb04 testenv: Use format constants
324f3fc tests/A64: Unicorn interface fixes
98ecbe7 tests/A64: Fuzz against unicorn
b1d38e7 tests/A64: Move TestEnvironment to own header
5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate
b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31
64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers
1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64
edadeea A64 inferface: Use two argument static_assert
9ab1304 A64: Add ExceptionRaised IR instruction
6843eed Update readme
7438d07 A64/translate: Add TranslateSingleInstruction function
 2018-01-13 22:38:57 +00:00
bunnei
17af2937fe arm_unicorn: Log unmapped memory access address. 2018-01-13 16:24:05 -05:00
bunnei
1247c53786 yuzu: Update license text to be consistent across project. 2018-01-13 16:22:39 -05:00
MerryMage
d2fbc78320 arm_dynarmic: Implement core 2018-01-12 17:48:29 -05:00
bunnei
b38223f662 arm_unicorn: Load/release unicorn DLL. 2018-01-04 13:40:01 -05:00
bunnei
3f8b9181b5 unicorn: Use for arm interface on Windows. 2018-01-04 00:13:23 -05:00
bunnei
6e9d66fd3a arm_dynarmic: More cleanup. 2018-01-04 00:09:12 -05:00
bunnei
aa7e061e71 arm_dynarmic: Gut interface until dynarmic is ready for general use. 2018-01-03 22:10:11 -05:00
bunnei
b172f0d770 arm: Remove SkyEye/Dyncom code that is ARMv6-only. 2018-01-02 22:24:12 -05:00
bunnei
45db4bb3ea logging: Rename category "Core_ARM11" to "Core_ARM". 2017-10-23 00:13:12 -04:00
bunnei
b1d5db1cf6 Merge remote-tracking branch 'upstream/master' into nx 
# Conflicts:
#	src/core/CMakeLists.txt
#	src/core/arm/dynarmic/arm_dynarmic.cpp
#	src/core/arm/dyncom/arm_dyncom.cpp
#	src/core/hle/kernel/process.cpp
#	src/core/hle/kernel/thread.cpp
#	src/core/hle/kernel/thread.h
#	src/core/hle/kernel/vm_manager.cpp
#	src/core/loader/3dsx.cpp
#	src/core/loader/elf.cpp
#	src/core/loader/ncch.cpp
#	src/core/memory.cpp
#	src/core/memory.h
#	src/core/memory_setup.h
 2017-10-09 23:56:20 -04:00
bunnei
6377585edb arm_interface: Set TLS address for dynarmic core. 2017-09-30 14:34:03 -04:00
bunnei
3411883fe3 arm: Use 64-bit addressing in a bunch of places. 2017-09-30 14:28:53 -04:00
Huw Pascoe
529f4a0131 Moved down_count to CoreTiming 2017-09-30 17:38:14 +01:00
MerryMage
67a70bd9e1 ARM_Interface: Implement PageTableChanged 2017-09-24 23:08:25 +01:00
B3n30
813837c5cf Merge pull request #2842 from Subv/switchable_page_table 
Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
 2017-09-15 22:41:45 +02:00
Subv
7a3ab7c63d CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime. 2017-09-15 14:26:22 -05:00
Subv
d237a89048 CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions. 2017-08-21 08:34:25 -05:00
Subv
9d0841b48b Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache. 
Fixes a few warnings.
 2017-08-21 08:34:23 -05:00
Subv
d3fb1d6c38 Dyncom: Fixed a conversion warning when decoding thumb instructions. 2017-08-21 08:20:36 -05:00
Sebastian Valle
c291db72e7 Merge pull request #2692 from Subv/vfp_ftz 
Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
 2017-05-22 12:16:53 -05:00
Subv
5b46a89230 fixup! Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled. 2017-05-21 18:56:09 -05:00