2018-02-08 19:26:20 -08:00
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using ChocolArm64.Exceptions;
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2018-02-04 15:08:20 -08:00
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using ChocolArm64.State;
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using System;
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using System.Collections.Generic;
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2018-03-09 18:12:57 -08:00
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using System.Runtime.InteropServices;
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2018-05-11 16:10:27 -07:00
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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2018-02-04 15:08:20 -08:00
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namespace ChocolArm64.Memory
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{
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NvServices refactoring (#120)
* Initial implementation of NvMap/NvHostCtrl
* More work on NvHostCtrl
* Refactoring of nvservices, move GPU Vmm, make Vmm per-process, refactor most gpu devices, move Gpu to Core, fix CbBind
* Implement GetGpuTime, support CancelSynchronization, fix issue on InsertWaitingMutex, proper double buffering support (again, not working properly for commercial games, only hb)
* Try to fix perf regression reading/writing textures, moved syncpts and events to a UserCtx class, delete global state when the process exits, other minor tweaks
* Remove now unused code, add comment about probably wrong result codes
2018-05-07 11:53:23 -07:00
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public unsafe class AMemory : IAMemory, IDisposable
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{
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private const long ErgMask = (4 << AThreadState.ErgSizeLog2) - 1;
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2018-02-06 07:15:08 -08:00
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2018-02-04 15:08:20 -08:00
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public AMemoryMgr Manager { get; private set; }
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private struct ExMonitor
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{
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public long Position { get; private set; }
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private bool ExState;
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public ExMonitor(long Position, bool ExState)
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{
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this.Position = Position;
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this.ExState = ExState;
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}
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public bool HasExclusiveAccess(long Position)
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{
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return this.Position == Position && ExState;
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}
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public void Reset()
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{
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ExState = false;
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}
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}
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private Dictionary<int, ExMonitor> Monitors;
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private HashSet<long> ExAddrs;
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public IntPtr Ram { get; private set; }
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2018-02-04 15:08:20 -08:00
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private byte* RamPtr;
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2018-03-09 18:12:57 -08:00
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public AMemory()
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2018-02-04 15:08:20 -08:00
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{
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Manager = new AMemoryMgr();
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2018-02-04 15:08:20 -08:00
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Monitors = new Dictionary<int, ExMonitor>();
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ExAddrs = new HashSet<long>();
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2018-03-09 18:12:57 -08:00
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Ram = Marshal.AllocHGlobal((IntPtr)AMemoryMgr.RamSize + AMemoryMgr.PageSize);
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RamPtr = (byte*)Ram;
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}
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public void RemoveMonitor(int ThreadId)
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{
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lock (Monitors)
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{
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if (Monitors.TryGetValue(ThreadId, out ExMonitor Monitor))
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{
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ExAddrs.Remove(Monitor.Position);
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}
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2018-02-04 15:08:20 -08:00
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Monitors.Remove(ThreadId);
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}
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}
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public void SetExclusive(AThreadState ThreadState, long Position)
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{
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Position &= ~ErgMask;
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lock (Monitors)
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{
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if (Monitors.TryGetValue(ThreadState.ThreadId, out ExMonitor Monitor))
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{
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ExAddrs.Remove(Monitor.Position);
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}
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bool ExState = ExAddrs.Add(Position);
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Monitor = new ExMonitor(Position, ExState);
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if (!Monitors.TryAdd(ThreadState.ThreadId, Monitor))
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{
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Monitors[ThreadState.ThreadId] = Monitor;
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2018-02-04 15:08:20 -08:00
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}
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}
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}
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public bool TestExclusive(AThreadState ThreadState, long Position)
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{
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Position &= ~ErgMask;
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lock (Monitors)
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{
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if (!Monitors.TryGetValue(ThreadState.ThreadId, out ExMonitor Monitor))
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{
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return false;
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}
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return Monitor.HasExclusiveAccess(Position);
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}
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}
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public void ClearExclusive(AThreadState ThreadState)
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{
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lock (Monitors)
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{
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2018-02-18 11:28:07 -08:00
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if (Monitors.TryGetValue(ThreadState.ThreadId, out ExMonitor Monitor))
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2018-02-04 15:08:20 -08:00
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{
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Monitor.Reset();
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ExAddrs.Remove(Monitor.Position);
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}
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}
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}
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public bool AcquireAddress(long Position)
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{
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Position &= ~ErgMask;
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lock (Monitors)
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{
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return ExAddrs.Add(Position);
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}
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}
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public void ReleaseAddress(long Position)
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{
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Position &= ~ErgMask;
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lock (Monitors)
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{
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ExAddrs.Remove(Position);
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}
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}
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2018-03-10 15:39:16 -08:00
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public sbyte ReadSByte(long Position)
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{
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return (sbyte)ReadByte(Position);
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}
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public short ReadInt16(long Position)
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{
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return (short)ReadUInt16(Position);
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}
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public int ReadInt32(long Position)
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{
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return (int)ReadUInt32(Position);
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}
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public long ReadInt64(long Position)
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{
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return (long)ReadUInt64(Position);
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}
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public byte ReadByte(long Position)
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{
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EnsureAccessIsValid(Position, AMemoryPerm.Read);
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2018-03-10 15:39:16 -08:00
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return ReadByteUnchecked(Position);
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}
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public ushort ReadUInt16(long Position)
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{
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 1, AMemoryPerm.Read);
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return ReadUInt16Unchecked(Position);
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}
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public uint ReadUInt32(long Position)
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{
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 3, AMemoryPerm.Read);
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return ReadUInt32Unchecked(Position);
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}
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public ulong ReadUInt64(long Position)
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{
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 7, AMemoryPerm.Read);
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2018-03-10 15:39:16 -08:00
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return ReadUInt64Unchecked(Position);
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}
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public Vector128<float> ReadVector8(long Position)
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{
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ReadByte(Position)));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 13:06:11 -08:00
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}
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public Vector128<float> ReadVector16(long Position)
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{
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2018-05-11 16:10:27 -07:00
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<ushort, float>(Sse2.Insert(Sse2.SetZeroVector128<ushort>(), ReadUInt16(Position), 0));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 13:06:11 -08:00
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}
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public Vector128<float> ReadVector32(long Position)
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{
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 3, AMemoryPerm.Read);
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if (Sse.IsSupported)
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{
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return Sse.LoadScalarVector128((float*)(RamPtr + (uint)Position));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 13:06:11 -08:00
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}
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public Vector128<float> ReadVector64(long Position)
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{
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2018-05-11 16:10:27 -07:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 7, AMemoryPerm.Read);
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<double, float>(Sse2.LoadScalarVector128((double*)(RamPtr + (uint)Position)));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 13:06:11 -08:00
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}
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public Vector128<float> ReadVector128(long Position)
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{
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 15, AMemoryPerm.Read);
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if (Sse.IsSupported)
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{
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return Sse.LoadVector128((float*)(RamPtr + (uint)Position));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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}
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public sbyte ReadSByteUnchecked(long Position)
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{
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return (sbyte)ReadByteUnchecked(Position);
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}
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public short ReadInt16Unchecked(long Position)
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{
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return (short)ReadUInt16Unchecked(Position);
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}
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public int ReadInt32Unchecked(long Position)
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{
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return (int)ReadUInt32Unchecked(Position);
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}
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public long ReadInt64Unchecked(long Position)
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{
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return (long)ReadUInt64Unchecked(Position);
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}
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public byte ReadByteUnchecked(long Position)
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{
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return *((byte*)(RamPtr + (uint)Position));
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}
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public ushort ReadUInt16Unchecked(long Position)
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{
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return *((ushort*)(RamPtr + (uint)Position));
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}
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public uint ReadUInt32Unchecked(long Position)
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{
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return *((uint*)(RamPtr + (uint)Position));
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}
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public ulong ReadUInt64Unchecked(long Position)
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{
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return *((ulong*)(RamPtr + (uint)Position));
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}
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2018-05-11 16:10:27 -07:00
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public Vector128<float> ReadVector8Unchecked(long Position)
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{
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2018-05-11 16:10:27 -07:00
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ReadByte(Position)));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-03-10 15:39:16 -08:00
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}
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2018-05-11 16:10:27 -07:00
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public Vector128<float> ReadVector16Unchecked(long Position)
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{
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2018-05-11 16:10:27 -07:00
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<ushort, float>(Sse2.Insert(Sse2.SetZeroVector128<ushort>(), ReadUInt16Unchecked(Position), 0));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-03-10 15:39:16 -08:00
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}
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2018-05-11 16:10:27 -07:00
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public Vector128<float> ReadVector32Unchecked(long Position)
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{
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2018-05-11 16:10:27 -07:00
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if (Sse.IsSupported)
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{
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return Sse.LoadScalarVector128((float*)(RamPtr + (uint)Position));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-03-10 15:39:16 -08:00
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}
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2018-05-11 16:10:27 -07:00
|
|
|
public Vector128<float> ReadVector64Unchecked(long Position)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.StaticCast<double, float>(Sse2.LoadScalarVector128((double*)(RamPtr + (uint)Position)));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public Vector128<float> ReadVector128Unchecked(long Position)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse.IsSupported)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
return Sse.LoadVector128((float*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteSByte(long Position, sbyte Value)
|
|
|
|
{
|
|
|
|
WriteByte(Position, (byte)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt16(long Position, short Value)
|
|
|
|
{
|
|
|
|
WriteUInt16(Position, (ushort)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt32(long Position, int Value)
|
|
|
|
{
|
|
|
|
WriteUInt32(Position, (uint)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt64(long Position, long Value)
|
|
|
|
{
|
|
|
|
WriteUInt64(Position, (ulong)Value);
|
|
|
|
}
|
2018-02-04 15:08:20 -08:00
|
|
|
|
|
|
|
public void WriteByte(long Position, byte Value)
|
|
|
|
{
|
2018-02-08 19:26:20 -08:00
|
|
|
EnsureAccessIsValid(Position, AMemoryPerm.Write);
|
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
WriteByteUnchecked(Position, Value);
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt16(long Position, ushort Value)
|
|
|
|
{
|
2018-03-09 18:12:57 -08:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 1, AMemoryPerm.Write);
|
2018-02-08 19:26:20 -08:00
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
WriteUInt16Unchecked(Position, Value);
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt32(long Position, uint Value)
|
|
|
|
{
|
2018-03-09 18:12:57 -08:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 3, AMemoryPerm.Write);
|
2018-02-08 19:26:20 -08:00
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
WriteUInt32Unchecked(Position, Value);
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt64(long Position, ulong Value)
|
|
|
|
{
|
2018-03-09 18:12:57 -08:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 7, AMemoryPerm.Write);
|
2018-02-08 19:26:20 -08:00
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
WriteUInt64Unchecked(Position, Value);
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector8(long Position, Vector128<float> Value)
|
2018-02-17 13:06:11 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByte(Position, Sse41.Extract(Sse.StaticCast<float, byte>(Value), 0));
|
|
|
|
}
|
|
|
|
else if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByte(Position, (byte)Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 13:06:11 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector16(long Position, Vector128<float> Value)
|
2018-02-17 13:06:11 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteUInt16(Position, Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 13:06:11 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector32(long Position, Vector128<float> Value)
|
2018-02-17 13:06:11 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 3, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.StoreScalar((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 13:06:11 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector64(long Position, Vector128<float> Value)
|
2018-02-17 13:06:11 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 7, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
Sse2.StoreScalar((double*)(RamPtr + (uint)Position), Sse.StaticCast<float, double>(Value));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 13:06:11 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector128(long Position, Vector128<float> Value)
|
2018-02-04 15:08:20 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 15, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.Store((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
public void WriteSByteUnchecked(long Position, sbyte Value)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, (byte)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt16Unchecked(long Position, short Value)
|
|
|
|
{
|
|
|
|
WriteUInt16Unchecked(Position, (ushort)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt32Unchecked(long Position, int Value)
|
|
|
|
{
|
|
|
|
WriteUInt32Unchecked(Position, (uint)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt64Unchecked(long Position, long Value)
|
|
|
|
{
|
|
|
|
WriteUInt64Unchecked(Position, (ulong)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteByteUnchecked(long Position, byte Value)
|
|
|
|
{
|
|
|
|
*((byte*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt16Unchecked(long Position, ushort Value)
|
|
|
|
{
|
|
|
|
*((ushort*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt32Unchecked(long Position, uint Value)
|
|
|
|
{
|
|
|
|
*((uint*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt64Unchecked(long Position, ulong Value)
|
|
|
|
{
|
|
|
|
*((ulong*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector8Unchecked(long Position, Vector128<float> Value)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, Sse41.Extract(Sse.StaticCast<float, byte>(Value), 0));
|
|
|
|
}
|
|
|
|
else if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, (byte)Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector16Unchecked(long Position, Vector128<float> Value)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteUInt16Unchecked(Position, Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector32Unchecked(long Position, Vector128<float> Value)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.StoreScalar((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector64Unchecked(long Position, Vector128<float> Value)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
Sse2.StoreScalar((double*)(RamPtr + (uint)Position), Sse.StaticCast<float, double>(Value));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-05-11 16:10:27 -07:00
|
|
|
public void WriteVector128Unchecked(long Position, Vector128<float> Value)
|
2018-03-10 15:39:16 -08:00
|
|
|
{
|
2018-05-11 16:10:27 -07:00
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.Store((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-10 15:39:16 -08:00
|
|
|
}
|
|
|
|
|
2018-02-08 19:26:20 -08:00
|
|
|
private void EnsureAccessIsValid(long Position, AMemoryPerm Perm)
|
2018-02-04 15:08:20 -08:00
|
|
|
{
|
2018-03-10 15:39:16 -08:00
|
|
|
if (!Manager.IsMapped(Position))
|
2018-02-08 19:26:20 -08:00
|
|
|
{
|
2018-03-10 15:39:16 -08:00
|
|
|
throw new VmmPageFaultException(Position);
|
|
|
|
}
|
2018-03-09 18:12:57 -08:00
|
|
|
|
2018-03-10 15:39:16 -08:00
|
|
|
if (!Manager.HasPermission(Position, Perm))
|
|
|
|
{
|
|
|
|
throw new VmmAccessViolationException(Position, Perm);
|
2018-02-08 19:26:20 -08:00
|
|
|
}
|
2018-03-09 18:12:57 -08:00
|
|
|
}
|
2018-02-08 19:26:20 -08:00
|
|
|
|
2018-03-09 18:12:57 -08:00
|
|
|
public void Dispose()
|
|
|
|
{
|
|
|
|
Dispose(true);
|
|
|
|
}
|
|
|
|
|
|
|
|
protected virtual void Dispose(bool disposing)
|
|
|
|
{
|
|
|
|
if (Ram != IntPtr.Zero)
|
2018-02-08 19:26:20 -08:00
|
|
|
{
|
2018-03-09 18:12:57 -08:00
|
|
|
Marshal.FreeHGlobal(Ram);
|
|
|
|
|
|
|
|
Ram = IntPtr.Zero;
|
2018-02-08 19:26:20 -08:00
|
|
|
}
|
2018-02-04 15:08:20 -08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|