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Fix LDXP/LDAXP when Rt == Rn (#274)
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e71da4fb74
commit
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@ -48,18 +48,24 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp;
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if (AccType.HasFlag(AccessType.Ordered))
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bool Ordered = (AccType & AccessType.Ordered) != 0;
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bool Exclusive = (AccType & AccessType.Exclusive) != 0;
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if (Ordered)
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{
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EmitBarrier(Context);
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}
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if (AccType.HasFlag(AccessType.Exclusive))
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if (Exclusive)
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{
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EmitMemoryCall(Context, nameof(AMemory.SetExclusive), Op.Rn);
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}
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Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
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Context.EmitLdint(Op.Rn);
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Context.EmitSttmp();
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Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
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Context.EmitLdtmp();
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EmitReadZxCall(Context, Op.Size);
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@ -68,7 +74,7 @@ namespace ChocolArm64.Instruction
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if (Pair)
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{
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Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
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Context.EmitLdint(Op.Rn);
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Context.EmitLdtmp();
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Context.EmitLdc_I(8 << Op.Size);
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Context.Emit(OpCodes.Add);
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@ -104,7 +110,10 @@ namespace ChocolArm64.Instruction
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{
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AOpCodeMemEx Op = (AOpCodeMemEx)Context.CurrOp;
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if (AccType.HasFlag(AccessType.Ordered))
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bool Ordered = (AccType & AccessType.Ordered) != 0;
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bool Exclusive = (AccType & AccessType.Exclusive) != 0;
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if (Ordered)
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{
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EmitBarrier(Context);
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}
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@ -112,7 +121,7 @@ namespace ChocolArm64.Instruction
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AILLabel LblEx = new AILLabel();
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AILLabel LblEnd = new AILLabel();
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if (AccType.HasFlag(AccessType.Exclusive))
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if (Exclusive)
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{
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EmitMemoryCall(Context, nameof(AMemory.TestExclusive), Op.Rn);
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@ -145,7 +154,7 @@ namespace ChocolArm64.Instruction
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EmitWriteCall(Context, Op.Size);
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}
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if (AccType.HasFlag(AccessType.Exclusive))
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if (Exclusive)
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{
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Context.EmitLdc_I8(0);
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Context.EmitStintzr(Op.Rs);
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