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https://github.com/yuzu-emu/yuzu-android
synced 2024-12-27 14:41:20 -08:00
shader: Implement fine derivates constant propagation
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@ -341,6 +341,9 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
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if (!ctx.profile.xfb_varyings.empty()) {
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ctx.AddCapability(spv::Capability::TransformFeedback);
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}
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if (info.uses_derivates) {
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ctx.AddCapability(spv::Capability::DerivativeControl);
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}
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// TODO: Track this usage
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ctx.AddCapability(spv::Capability::ImageGatherExtended);
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ctx.AddCapability(spv::Capability::ImageQuery);
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@ -529,4 +529,8 @@ Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id
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Id segmentation_mask);
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Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle);
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Id EmitDPdxFine(EmitContext& ctx, Id op_a);
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Id EmitDPdyFine(EmitContext& ctx, Id op_a);
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} // namespace Shader::Backend::SPIRV
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@ -183,4 +183,12 @@ Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle) {
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return ctx.OpFAdd(ctx.F32[1], result_a, result_b);
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}
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Id EmitDPdxFine(EmitContext& ctx, Id op_a) {
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return ctx.OpDPdxFine(ctx.F32[1], op_a);
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}
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Id EmitDPdyFine(EmitContext& ctx, Id op_a) {
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return ctx.OpDPdyFine(ctx.F32[1], op_a);
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}
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} // namespace Shader::Backend::SPIRV
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@ -1925,4 +1925,12 @@ F32 IREmitter::FSwizzleAdd(const F32& a, const F32& b, const U32& swizzle, FpCon
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return Inst<F32>(Opcode::FSwizzleAdd, Flags{control}, a, b, swizzle);
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}
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F32 IREmitter::DPdxFine(const F32& a) {
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return Inst<F32>(Opcode::DPdxFine, a);
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}
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F32 IREmitter::DPdyFine(const F32& a) {
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return Inst<F32>(Opcode::DPdyFine, a);
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}
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} // namespace Shader::IR
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@ -353,6 +353,10 @@ public:
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[[nodiscard]] F32 FSwizzleAdd(const F32& a, const F32& b, const U32& swizzle,
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FpControl control = {});
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[[nodiscard]] F32 DPdxFine(const F32& a);
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[[nodiscard]] F32 DPdyFine(const F32& a);
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private:
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IR::Block::iterator insertion_point;
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@ -511,3 +511,5 @@ OPCODE(ShuffleUp, U32, U32,
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OPCODE(ShuffleDown, U32, U32, U32, U32, U32, )
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OPCODE(ShuffleButterfly, U32, U32, U32, U32, U32, )
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OPCODE(FSwizzleAdd, F32, F32, F32, U32, )
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OPCODE(DPdxFine, F32, F32, )
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OPCODE(DPdyFine, F32, F32, )
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@ -530,6 +530,10 @@ void VisitUsages(Info& info, IR::Inst& inst) {
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case IR::Opcode::FSwizzleAdd:
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info.uses_fswzadd = true;
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break;
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case IR::Opcode::DPdxFine:
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case IR::Opcode::DPdyFine:
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info.uses_derivates = true;
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break;
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case IR::Opcode::LoadStorageU8:
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case IR::Opcode::LoadStorageS8:
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case IR::Opcode::WriteStorageU8:
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@ -412,6 +412,71 @@ void FoldCompositeExtract(IR::Inst& inst, IR::Opcode construct, IR::Opcode inser
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inst.ReplaceUsesWith(*result);
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}
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IR::Value GetThroughCast(IR::Value value, IR::Opcode expected_cast) {
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if (value.IsImmediate()) {
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return value;
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}
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IR::Inst* const inst{value.InstRecursive()};
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if (inst->GetOpcode() == expected_cast) {
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return inst->Arg(0).Resolve();
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}
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return value;
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}
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void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
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const IR::Value swizzle{inst.Arg(2)};
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if (!swizzle.IsImmediate()) {
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return;
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}
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const IR::Value value_1{GetThroughCast(inst.Arg(0).Resolve(), IR::Opcode::BitCastF32U32)};
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const IR::Value value_2{GetThroughCast(inst.Arg(1).Resolve(), IR::Opcode::BitCastF32U32)};
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if (value_1.IsImmediate()) {
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return;
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}
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const u32 swizzle_value{swizzle.U32()};
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if (swizzle_value != 0x99 && swizzle_value != 0xA5) {
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return;
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}
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IR::Inst* const inst2{value_1.InstRecursive()};
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if (inst2->GetOpcode() != IR::Opcode::ShuffleButterfly) {
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return;
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}
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const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
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if (value_2 != value_3) {
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return;
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}
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const IR::Value index{inst2->Arg(1)};
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const IR::Value clamp{inst2->Arg(2)};
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const IR::Value segmentation_mask{inst2->Arg(3)};
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if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
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return;
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}
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if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
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return;
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}
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if (swizzle_value == 0x99) {
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// DPdxFine
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if (index.U32() == 1) {
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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inst.ReplaceUsesWith(ir.DPdxFine(IR::F32{value_2}));
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}
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} else if (swizzle_value == 0xA5) {
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// DPdyFine
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if (index.U32() == 2) {
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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inst.ReplaceUsesWith(ir.DPdyFine(IR::F32{value_2}));
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}
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}
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}
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void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
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switch (inst.GetOpcode()) {
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case IR::Opcode::GetRegister:
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@ -532,6 +597,8 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
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case IR::Opcode::CompositeExtractF16x4:
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return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF16x4,
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IR::Opcode::CompositeInsertF16x4);
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case IR::Opcode::FSwizzleAdd:
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return FoldFSwizzleAdd(block, inst);
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default:
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break;
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}
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@ -147,6 +147,7 @@ struct Info {
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bool uses_subgroup_vote{};
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bool uses_subgroup_mask{};
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bool uses_fswzadd{};
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bool uses_derivates{};
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bool uses_typeless_image_reads{};
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bool uses_typeless_image_writes{};
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bool uses_shared_increment{};
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